High-Power, Quad, PSE Controller
for Power-Over-Ethernet
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
AGND
= 32V to 60V, V
EE
= 0V, V
DD
to V
DGND
= +3.3V, all voltages are referenced to V
EE
, unless otherwise noted. Typical values are at
V
AGND
= +48V, V
DGND
= +48V, V
DD
= (V
DGND
+ 3.3V), T
A
= +25癈. Currents are positive when entering the pin and negative other-
wise.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY MONITORS
V
EE
Undervoltage Lockout
V
EEUVLO
V
AGND
- V
EE
, V
AGND
- V
EE
increasing
28.5
V
V
EE
Undervoltage Lockout
Hysteresis
V
EEUVLOH
P or ts shut d ow n i f V
AGND
-
V
E E
< V
U V L O
-
V
E E
U V
L OH
3
V
V
EE
Overvoltage Lockout
V
EE_OV
V
EE_OV
event bit sets and ports shut down if
V
AGND
- V
EE
> V
EE_OV
, V
AGND
increasing
62.5
V
V
EE
Overvoltage Lockout
Hysteresis
V
OVH
1
V
V
EE
Undervoltage
V
EE_UV
V
E E
_ U V
event b i t i s set i f V
AGND
-
V
E E
<
V
E E _ U V
,
V
E E
i ncr easi ng
40
V
MAX5952A
3.82
V
DD
Overvoltage
V
DD_OV
V
DD_OV
event bit is set if
V
DD
- V
DGND
> V
DD_OV
;
V
DD
increasing
MAX5952C
5.7
V
MAX5952A
2.7
V
DD
Undervoltage
V
DD_UV
V
DD_OV
is set if V
DD
- V
DGND
> V
DD_UV
, V
DD
decreasing
MAX5952C
4.2
V
V
DD
Undervoltage Lockout
V
DDUVLO
Device operates when V
DD
- V
DGND
>
V
DDUVLO
, V
DD
increasing
2
V
V
DD
Undervoltage Lockout
Hysteresis
V
DDHYS
120
mV
Thermal Shutdown Threshold
T
SHD
Ports shut down and device resets if its
junction temperature exceeds this limit,
temperature increasing (Note 4)
150
癈
Thermal Shutdown Hysteresis
T
SHDH
Thermal hysteresis, temperature decreasing
(Note 5)
20
癈
OUTPUT MONITOR
OUT_ Input Current
I
BOUT
V
OUT
= V
AGND
, all modes
2
礎
Idle Pullup Current at OUT_
I
DIS
OUT_ discharge current, detection and
classification off, port shutdown,
V
OUT_
= V
AGND
- 2.8V
200
260
礎
PGOOD High Threshold
PG
TH
V
OUT_
- V
EE
, OUT_ decreasing
1.5
2.0
2.5
V
PGOOD Hysteresis
PG
HYS
220
mV
PGOOD Low-to-High Glitch
Filter
t
PGOOD
Minimum time PGOOD has to be high to set
bit in register 10h
3
ms
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